News

Intel funds our research on secure test interface

Intel funds our three-year project on “Provably-Secure Scan Locking.” In this project, we will be working with Intel to develop on-chip defenses to hide plain test and configuration data from third-party (potentially untrustworthy) testers and yet enable them to test and configure chips.

DARPA (of US DoD) Seedling Award for our Logic Locking Research

We won the DARPA seedling grant to further our logic locking research. We are teaming up with UC San Diego, UT Dallas and Texas A&M on this project titled “ECLIPSE: Efficient Cross-Layered IP Protection SchemE.” The project duration is 18 months. Seedling grants are meant to bring projects with potential to a more mature level, so they compete again for the much bigger grant.

US Army Research Office (Department of Defense) provides $400K funding

US Army Research Office (Department of Defense) provides $400K funding for our research on IC camouflaging. The goal of the project is to develop layout level countermeasures against reverse engineering. The project will develop metrics to guide the insertion of camouflaged cells at the layout level. This a joint project with Prof. Ramesh Karri’s (co-PI) group at the Polytechnic Institute of NYU.

US National Science Foundation provides $500K funding

US National Science Foundation provides $500K funding for our research on secure high-level synthesis. The goal of the project is to develop novel high-level synthesis methodologies that will produce reverse-engineering resilient designs. This a joint project with Prof. Ramesh Karri’s (co-PI) group at the Polytechnic Institute of NYU.

TwinLab on Hardware Security and Trust has been launched with the support of GLOBALFOUNDRIES on a $2.6M budget

TwinLab on Hardware Security and Trust has been launched with the support of GLOBALFOUNDRIES on a $2.6M budget. The TwinLab consists of DfX and MOMA lab personnel in addition to a senior IC designer, who will be a CSS-AD personnel. The goal of the TwinLab is to design and fabricate the first truly trustworthy microrprocessor chip in close collaboration with GLOBALFOUNDRIES.

SRC/Mubadala Technology provides $463K funding

SRC/Mubadala Technology provides $463K funding for our project on “Security and Test Implications of NEMS” in the MEES III call. Semiconductor Research Corporation channels the funding provided by UAE’s Mubadala Technology to local universities in the UAE.

Samah Saeed won the TTTC Best Doctoral Thesis Award

This award is given every year to one graduating PhD student in the VLSI Testing community for the quality and impact of their research. The judges are from both industry and academia, where each is represented 50%. Samah had won the semi-final compatition at the VLSI Test Sympoisum in Napa in April 2014 to represent the North America Continent in the final. In October in Seattle, the final competition was held at International Test Conference, and Samah won!

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