Intellectual Property

  1. Ozgur Sinanoglu, Muhammad Yasin and Jeyavijayan Rajendran, “System, Method and Computer-Accessible Medium for Satisfiability Resistant Attack Resistant Logic Locking”, U.S. Patent pending, filed Mar 2016.
  2. Jeyavijayan Rajendran, Ozgur Sinanoglu and Ramesh Karri, “System, Method And Computer-Accessible Medium For Fault Analysis Driven Selection Of Logic Gates To Be Camouflaged”, U.S. Patent pending, filed Sep 2013, published under International Publication No. WO 2015/038587 by World Intellectual Property Organization Mar 2015.
  3. Jeyavijayan Rajendran, Ozgur Sinanoglu and Ramesh Karri, “Security-Centric Electronic System Design”, U.S. Patent pending, filed Mar 2015.
  4. Jeyavijayan Rajendran, Youngok Pino, Ramesh Karri and Ozgur Sinanoglu, “System, Method and Computer-Accessible Medium for Facilitating An Unbreakable Logic Encryption”, U.S. Patent pending, filed Mar 2013.
  5. Jeyavijayan Rajendran, Ozgur Sinanoglu and Ramesh Karri “System, Method and Computer-Accessible Medium for Providing Secure Split Manufacturing”, U.S. Patent pending, filed Mar, 2013, published under International Publication No. WO 2014/153029 by World Intellectual Property Organization Sep 2014.
  6. Ozgur Sinanoglu, “Test Access System, Method and Computer Accessible Medium for Chips with Spare Identical Cores”, U.S. Patent No. 9,262,292, issued Feb 2016.
  7. Ozgur Sinanoglu, “System, Method and Computer-Accessible Medium for DfT Support for Launch and Capture Power Reduction in Launch-Off-Capture Testing”, U.S. Patent No 9,170,298, issued Oct 2015.
  8. Ozgur Sinanoglu, “Systems, Processes and Computer-Accessible Medium for Providing a Bidirectional Scan Path for Peak Capture Power Reduction in Launch-Off-Shift Testing”, U.S. Patent pending, filed Jan, 2012.
  9. Jeyavijayan Rajendran, Youngok Pino, Ramesh Karri and Ozgur Sinanoglu, “Systems, Processes and Computer-Accessible Medium for Providing Logic Encryption Utilizing Fault Analysis”, U.S. Patent No. 9,081,929, issued July 14, 2015.
  10. Ozgur Sinanoglu, “Architecture, System, Method and Computer-Accessible Medium for Toggle-Based Masking”, U.S. Patent No. 8,756,468, issued June 17, 2014.
  11. Ozgur Sinanoglu, “Architecture, System, Method and Computer-Accessible Medium for Eliminating Scan Performance Penalty”, U.S. Patent No. 8,726,109, issued May 13, 2014.
  12. Ozgur Sinanoglu, “Architecture, System, Method and Computer-Accessible Medium for Partial Scan Testing”, U.S. Patent pending, filed March, 2011.
  13. Ozgur Sinanoglu, “Architecture, System, Method and Computer-Accessible Medium for Expedited-Compaction for Scan Power Reduction”, U.S. Patent pending, filed March, 2011.
  14. Vinayaka Jyothi, Jeyavijayan Rajendran, Ramesh Karri and Ozgur Sinanoglu, “Design and Analysis of Ring Oscillator Based Design-for-Trust Technique”, U.S. Patent No. 9,081,991, issued July 15, 2015.
  15. Ozgur Sinanoglu and Sobeeh Almukhaizim, “Circuit and Method for Increasing Scan Cell Observability of Response Compactors”, U.S. Patent No. 8,006,150, issued August 23, 2011.
  16. Sobeeh Almukhaizim and Ozgur Sinanoglu, “Circuit and Method Providing Dynamic Scan Chain Partitioning”, U.S. Patent No. 7,937,634, issued May 6, 2011.
  17. Ozgur Sinanoglu, “Circuit for Boosting Encoding Capabilities of Test Stimulus Decompressors”, U.S. Patent No. 7,930,607, issued Apr 19, 2011.