{"id":701,"date":"2017-08-03T08:09:54","date_gmt":"2017-08-03T08:09:54","guid":{"rendered":"http:\/\/sites.nyuad.nyu.edu\/dfx\/?page_id=701"},"modified":"2018-12-12T05:44:10","modified_gmt":"2018-12-12T05:44:10","slug":"first-chip-resilient-to-untrusted-fab-and-end-users","status":"publish","type":"page","link":"https:\/\/sites.nyuad.nyu.edu\/dfx\/first-chip-resilient-to-untrusted-fab-and-end-users\/","title":{"rendered":"First Chip Resilient to Untrusted Fab and End-Users"},"content":{"rendered":"<p>[et_pb_section bb_built=&#8221;1&#8243;][et_pb_row][et_pb_column type=&#8221;4_4&#8243;][et_pb_text _builder_version=&#8221;3.17.6&#8243; module_alignment=&#8221;left&#8221;]<\/p>\n<h1>First Chip Resilient to Hardware-Level Threats:<\/h1>\n<h1>Untrusted Fabrication and Reverse-Engineering<\/h1>\n<p>October 2017<\/p>\n<p>[\/et_pb_text][\/et_pb_column][\/et_pb_row][et_pb_row][et_pb_column type=&#8221;1_2&#8243;][et_pb_video _builder_version=&#8221;3.0.69&#8243; src=&#8221;https:\/\/youtu.be\/HJwjcwUdGFE&#8221; \/][et_pb_text _builder_version=&#8221;3.0.83&#8243;]<\/p>\n<h2>Do you think you can break our defense? We welcome attackers!<\/h2>\n<h2><strong>All information about this chip<\/strong> except for the secret key is available <span style=\"text-decoration: underline;\"><a href=\"https:\/\/github.com\/DfX-NYUAD\/CCS17\" target=\"_blank\" rel=\"noopener\">here<\/a><\/span>.<\/h2>\n<p>[\/et_pb_text][\/et_pb_column][et_pb_column type=&#8221;1_2&#8243;][et_pb_image _builder_version=&#8221;3.0.65&#8243; src=&#8221;https:\/\/sites.nyuad.nyu.edu\/dfx\/wp-content\/uploads\/2017\/08\/combined.jpg&#8221; show_in_lightbox=&#8221;off&#8221; url_new_window=&#8221;off&#8221; use_overlay=&#8221;off&#8221; sticky=&#8221;off&#8221; align=&#8221;left&#8221; always_center_on_mobile=&#8221;on&#8221; border_style=&#8221;solid&#8221; force_fullwidth=&#8221;off&#8221; animation_style=&#8221;slide&#8221; animation_duration=&#8221;500ms&#8221; animation_intensity_slide=&#8221;10%&#8221; animation_direction=&#8221;left&#8221; show_bottom_space=&#8221;on&#8221; \/][et_pb_video _builder_version=&#8221;3.0.69&#8243; src=&#8221;https:\/\/youtu.be\/qchQzX405mw&#8221; \/][\/et_pb_column][\/et_pb_row][et_pb_row][et_pb_column type=&#8221;4_4&#8243;][et_pb_text _builder_version=&#8221;3.0.65&#8243; background_layout=&#8221;light&#8221; text_orientation=&#8221;left&#8221; border_style=&#8221;solid&#8221; module_alignment=&#8221;left&#8221;]<\/p>\n<p>\n<strong>What\u2019s every chip company\u2019s worst nightmare?<\/strong><\/p>\n<p>Many design companies such as NVidia, Apple, Qualcomm, etc., design their chip and then have them manufactured by third-party fabrication facilities, somewhere in Taiwan, China, etc. They worry about their chip design details being stolen &#8211; we refer to this as Intellectual Property piracy &#8211; or their chips being tampered with via small modifications at the fabrication facility in the form of hardware Trojans. These Trojans may for instance disable a chip while it is performing a safety-critical operation, or may leak information while the chip is processing or communicating secretive information.<\/p>\n<p><strong>Our solution for this:<\/strong><\/p>\n<p>Our lab designed the chip above. This is a logic-locked chip with an ARM microprocessor inside. We received the high level design architecture from ARM, a UK-based microprocessor design company, and modified it using our software to implement our logic locking. We had the chips manufactured in the Singapore facilities of GlobalFoundries in 65 nm.<\/p>\n<p>In this chip, some of the microprocessor controller units have been logic-locked using Stripped Functionality Logic Locking (SFLL), which we&#8217;ll present at <strong>ACM Computer and Communications Security (CCS) 2017. <\/strong>Our lab, in collaboration with <a href=\"https:\/\/utdallas.edu\/~jv.ee\/\" target=\"_blank\" rel=\"noopener\">Prof Jeyavijayan Rajendran<\/a> from University of Texas at Dallas, gradually developed SFLL over years of research on logic locking.<\/p>\n<p><strong>How is this chip different than a regular chip?<\/strong><\/p>\n<p>Traditionally, security features are implemented at the software or system levels; for the first time, we have security implemented at the lowest possible level, the hardware level. This is quite important because if the hardware is compromised, there is no software or system security fix.<\/p>\n<p>This chip has <strong>physical locks implemented as<\/strong> <strong>part of its hardware design<\/strong>, hence called a logic-locked chip. This chip can be unlocked only by loading the secret binary key on its memory. Without it, the chip will not work. It will simply hang. Only when the secret key has been loaded, it does what it is supposed to do and executes the program loaded on its memory.<\/p>\n<p>We designed this in our lab and had them manufactured in Singapore &#8211; which is exactly what major chip companies do &#8211; but logic locking thwarts the kind of threats that chip design companies face.<\/p>\n<ol>\n<li>These logic-locked chips are useless without the secret key; so only the authorized users can use them.<\/li>\n<li>These chips can\u2019t be reverse engineered. No one will be able to duplicate the design even if they were to get a hold of the final chip because the locks are implemented as part of the design. The hardware implementation only shows part of the design &#8211; that\u2019s what the reverse engineers would see; the missing part is dictated by the value secret key. Without the knowledge of the secret key, reverse engineers would thus be missing the crucial part of the picture.<\/li>\n<\/ol>\n<p><strong>Does this solution apply to only microprocessor chips?<\/strong><\/p>\n<p>The locked microprocessor chip, shown above, has been used as a proof-of-concept. We can render any digital chip resilient to untrusted fabrication and reverse engineering. For this, we need to apply our logic locking software on its hardware design; the logic-locked design will then be protected from hardware-level threats.<\/p>\n<p><strong>Acknowledgement:<\/strong> This chip fabrication project was part of the <a href=\"https:\/\/sites.nyuad.nyu.edu\/dfx\/twinlab-on-hardware-security-and-trust-has-been-launched-with-the-support-of-globalfoundries-on-a-2-6m-budget\/\" target=\"_blank\" rel=\"noopener\">TwinLab initiative<\/a> and has been sponsored by New York University Abu Dhabi Institute, the Center for Cyber Security in Abu Dhabi (CCS-AD), and GlobalFoundries. Our logic locking research that led to the development of SFLL, which was used in this chip, has been sponsored by US National Science Foundation.<\/p>\n<p>[\/et_pb_text][\/et_pb_column][\/et_pb_row][\/et_pb_section]<\/p>\n","protected":false},"excerpt":{"rendered":"<p><div class=\"et_pb_row et_pb_row_0 et_pb_row_empty\">\n\t\t\t\t\n\t\t\t\t\n\t\t\t\t\n\t\t\t\t\n\t\t\t\t\n\t\t\t<\/div> First Chip Resilient to Hardware-Level Threats:Untrusted Fabrication and Reverse-EngineeringOctober 2017 <div class=\"et_pb_row et_pb_row_1 et_pb_row_empty\">\n\t\t\t\t\n\t\t\t\t\n\t\t\t\t\n\t\t\t\t\n\t\t\t\t\n\t\t\t<\/div> Do you think you can break our defense? We welcome attackers! All information about this chip except for the secret key is available here. <div class=\"et_pb_row et_pb_row_2 et_pb_row_empty\">\n\t\t\t\t\n\t\t\t\t\n\t\t\t\t\n\t\t\t\t\n\t\t\t\t\n\t\t\t<\/div> What\u2019s every chip company\u2019s worst nightmare? Many design companies such as NVidia, Apple, Qualcomm, etc., design their chip [&hellip;]<\/p>\n","protected":false},"author":2,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"_et_pb_use_builder":"on","_et_pb_old_content":"","_et_gb_content_width":"","_exactmetrics_skip_tracking":false,"_exactmetrics_sitenote_active":false,"_exactmetrics_sitenote_note":"","_exactmetrics_sitenote_category":0,"footnotes":""},"class_list":["post-701","page","type-page","status-publish","hentry"],"_links":{"self":[{"href":"https:\/\/sites.nyuad.nyu.edu\/dfx\/wp-json\/wp\/v2\/pages\/701","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/sites.nyuad.nyu.edu\/dfx\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/sites.nyuad.nyu.edu\/dfx\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/sites.nyuad.nyu.edu\/dfx\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/sites.nyuad.nyu.edu\/dfx\/wp-json\/wp\/v2\/comments?post=701"}],"version-history":[{"count":41,"href":"https:\/\/sites.nyuad.nyu.edu\/dfx\/wp-json\/wp\/v2\/pages\/701\/revisions"}],"predecessor-version":[{"id":983,"href":"https:\/\/sites.nyuad.nyu.edu\/dfx\/wp-json\/wp\/v2\/pages\/701\/revisions\/983"}],"wp:attachment":[{"href":"https:\/\/sites.nyuad.nyu.edu\/dfx\/wp-json\/wp\/v2\/media?parent=701"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}